We Offer

synthesizable IP cores

​for decoding video bitstreams compressed by the VESA VDC-M standard, and, encoding videos into bitstream following the VDC-M standard

What we Offer?

VICIP offers synthesizable IP cores for decoding video bitstreams compressed by the VESA VDC-M standard, and, encoding videos into bitstream following the VDC-M standard. The IPs can be easily integrated into FPGAs and ASICS.

VICIP has the best price in the market for its IP cores. Additionally, VICIP offers adaptation of its cores to satisfy customer needs.

The VESA Display Compression-M (VDC-M) video image compression standard assures visually lossless performance. It is compressing and decompressing bitstreams over HDMI, DisplayPort or MIPI.

The cores are fully tested with many images and configurations to achieve high coverage.

Synthesizability is achieved by careful RTL coding and synthesis warnings review.

QUESTIONS?

Whether you’re curious about features,  or you have queries related to company or services, we’re here to answer any questions.

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